Performance improvements in field effect transistors (FETs) are typically effected by shrinking the FET dimensions, a design approach known as scaling. As scaling drives gate dielectric dimensions to ever-thinner equivalent oxide thicknesses (EOTs), high dielectric constant (high-k) metal oxides and metal silicates are becoming increasingly attractive as candidate gate dielectric materials. The higher k of these materials (compared to SiO2) allows them to have a thicker physical thickness for a given EOT, thus decreasing device leakage and improving the chances of acceptable leakage values for EOTs below 1 nm.
A general concern with the use of ultrathin (<2 nm) gate dielectrics (high-k or conventional) is film thickness control. Unintended thickness variations as small as one angstrom (A) can produce order of magnitude variations in the leakage of a 15A gate dielectric, a highly undesirable situation. On the other hand, it is becoming increasingly desirable to utilize different gate dielectric thicknesses in different parts of an integrated circuit. For example, the overall power consumption and speed of an integrated circuit may be optimized by utilizing an aggressively low EOT for circuit-critical devices (to give high performance) and a moderate EOT (low power consumption) for rest of the circuit's devices.
Despite the potential advantages, there are a number of possible concerns about using high-k materials as gate dielectrics in FET devices. For example, many high-k gate dielectrics may produce substantial reductions in Si mobility, an effect that may or may not be mitigated with the use of ultrathin high-k layers and/or specially designed interface layers. Thermal stability is also a possible concern with certain combinations of high-k dielectric and gate materials. Various methods of “nitriding” the high-k material's top surface have been investigated as a means to prevent unwanted interactions between a subsequently deposited conductive gate material and to reduce growth of unwanted interface layers. However, it can be difficult to achieve the desired concentration profile of nitrogen (quantity and depth distribution) without damaging the high-k film and/or semiconductor substrate.
Other concerns exist regarding the feasibility of scaling high-k gate dielectric materials such as HfO2 to physical thicknesses below 1.5 to 2.0 nm. At early stages of growth, these films typically nucleate in islands and tend to be discontinuous. It is currently not clear that improvements to existing atomic layer chemical vapor deposition (ALCVD) and metal-organic chemical vapor deposition (MOCVD) processes (for example, introducing a change in precursors, deposition conditions, and/or new surface treatments) have the potential to produce continuous, defect-free films of the desired thickness.
Additional approaches for forming ultrathin high-k gate dielectrics for use in FETs (and for forming FETs with ultrathin high-k gate dielectrics) would thus be desirable in view of the problems described herein above.